Title :
JiffyTune: circuit optimization using time-domain sensitivities
Author :
Conn, Andrew R. ; Coulman, Paula K. ; Haring, Ruud A. ; Morrill, Gregory L. ; Visweswariah, Chandu ; Wu, Chai Wah
Author_Institution :
Dept. of Math. Sci., IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
fDate :
12/1/1998 12:00:00 AM
Abstract :
Automating the transistor and wire-sizing process is an important step toward being able to rapidly design high-performance, custom circuits. This paper presents a circuit optimization tool that automates the tuning task by means of state-of-the-art nonlinear optimization. It makes use of a fast circuit simulator and a general-purpose nonlinear optimization package. It includes minimax and power optimization, simultaneous transistor and wire tuning, general choices of objective functions and constraints, and recovery from nonworking circuits. In addition, the tool makes use of designer-friendly interfaces that automate the specification of the optimization task, the running of the optimizer, and the back-annotation of the results of optimization onto the circuit schematic. Particularly for large circuits, gradient computation is usually the bottleneck in the optimization procedure. In addition to traditional adjoint and direct methods, we use a technique called the adjoint Lagrangian method, which computes all the gradients necessary for one iteration of optimization in a single adjoint analysis. This paper describes the algorithms and the environment in which they are used and presents extensive circuit optimization results. A circuit with 6900 transistors, 4128 tunable transistors, and 60 independent parameters was optimized in about 108 min of CPU time on an IBM RISC/System 6000, model 590
Keywords :
circuit layout CAD; circuit optimisation; circuit simulation; integrated circuit layout; minimax techniques; sensitivity analysis; time-domain analysis; JiffyTune; adjoint Lagrangian method; back-annotation; circuit optimization tool; circuit schematic; designer-friendly interfaces; fast circuit simulator; general-purpose nonlinear optimization package; high-performance custom circuit design; minimax; objective functions; power optimization; time-domain sensitivities; transistor sizing process; wire-sizing process; Circuit optimization; Circuit simulation; Constraint optimization; Design optimization; Lagrangian functions; Minimax techniques; Optimization methods; Packaging; Time domain analysis; Wire;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on