Comparative study of FinFETs versus 22nm bulk CMOS technologies: SRAM design perspective

Author

Farkhani, Hooman ; Peiravi, Ali ; Kargaard, Jens Madsen ; Moradi, Farshad

Author_Institution

Ferdowsi Univ. of Mashhad, Mashhad, Iran

fYear

2014

fDate

2-5 Sept. 2014

Firstpage

449

Lastpage

454

Abstract

In this paper, FinFET devices are compared to bulk CMOS technology by looking at the characteristics of both devices and their challenges in nano-scale regimes. The effects of process variations on these devices along with the effect of device parameters on their characteristics are explored. Both FinFET and CMOS devices are used in 6T and 8T-SRAM cells. Simulation results show significant improvements for FinFET-based SRAMs compared to bulk CMOS-based SRAM cells. FinFET based 6T-SRAM cell shows 39% improvement in read static noise margin, 54% higher write margin, 54% smaller minimum supply voltage applicable, and 7.3X less leakage power compared to its CMOS counterpart. 8T-SRAM using FinFET improved read static noise margin, write margin, minimum supply voltage and leakage power consumption by 7%, 64%, 50%, and 3.1X compared to bulk-CMOS 8T-SRAM, respectively.

Keywords

CMOS memory circuits; MOSFET circuits; SRAM chips; logic design; 6T SRAM cells; 8T-SRAM cells; CMOS devices; FinFET devices; FinFET-based SRAM; SRAM design perspective; bulk CMOS technologies; bulk CMOS-based SRAM cells; device parameters; leakage power consumption; nanoscale regimes; process variations; read static noise margin; size 22 nm; supply voltage; write margin; CMOS integrated circuits; FinFETs; Logic gates; Power demand; SRAM cells; Threshold voltage; CMOS; FinFET; SRAM;

fLanguage

English

Publisher

ieee

Conference_Titel

System-on-Chip Conference (SOCC), 2014 27th IEEE International

Conference_Location

Las Vegas, NV

Type

conf

DOI

10.1109/SOCC.2014.6948971

Filename

6948971