• DocumentCode
    1463658
  • Title

    Material and process limits in silicon VLSI technology

  • Author

    Plummer, James D. ; Griffin, Peter B.

  • Author_Institution
    Stanford Univ., CA, USA
  • Volume
    89
  • Issue
    3
  • fYear
    2001
  • fDate
    3/1/2001 12:00:00 AM
  • Firstpage
    240
  • Lastpage
    258
  • Abstract
    The integrated circuit (IC) industry has followed a steady path of shrinking device geometries for more than 30 years. It is widely believed that this process will continue for at least another ten years. However there are increasingly difficult materials and technology problems to be solved over the next decade if this is to actually occur, and beyond ten years there is great uncertainty about the ability to continue scaling metal-oxide-semiconductor field-effect transistor (MOSFET) structures. This paper describes some of the the most challenging materials and process issues to be faced in the future and where possible solutions are known, describes these potential solutions. The paper is written with the underlying assumption that the basic metal-oxide-semiconductor (MOS) transistor will remain the dominant switching device used in ICs and it further assumes that silicon will remain the dominant substrate material
  • Keywords
    MOS integrated circuits; VLSI; elemental semiconductors; integrated circuit technology; semiconductor doping; silicon; IC industry; MOSFET structures; VLSI technology; material limits; process limits; scaling; shrinking device geometries; substrate material; switching device; Geometry; History; Inorganic materials; Integrated circuit technology; MOSFETs; Paper technology; Semiconductor materials; Silicon; Uncertainty; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Proceedings of the IEEE
  • Publisher
    ieee
  • ISSN
    0018-9219
  • Type

    jour

  • DOI
    10.1109/5.915373
  • Filename
    915373