DocumentCode :
146654
Title :
Time-Based Least Memory Intensive Scheduling
Author :
Elhelw, Amr S. ; El Moursy, Ali ; Fahmy, Hossam A. H.
Author_Institution :
Inf. Syst. Sector, Egyptian Financial Supervisory Authority, Cairo, Egypt
fYear :
2014
fDate :
23-25 Sept. 2014
Firstpage :
311
Lastpage :
318
Abstract :
In the modern chip-multiprocessor system, main memory is a shared resource among multiple concurrently executing threads/applications. The memory scheduling algorithms are developed to resolve memory contention by arbitrating memory access in such a way that competing threads progress at a relatively fast and even pace, resulting in high system throughput and fairness. This paper presents a new memory scheduling algorithm called Time-Based Least Memory Intensive scheduling (TB-LMI) that addresses system throughput and fairness with the goal of achieving a better throughput and limiting the unfairness. The main idea is to prioritize threads according to their memory contentions every pre-defined period of cycles to improve system throughput and to guarantee fairness. We evaluate TB-LMI on a variety of multi-programmed workloads with different queue sizes of memory controllers and compare its performance to four previously proposed scheduling algorithms. TB-LMI achieves the best system throughput and fairness. On 8-core system, TB-LMI improves system throughput and fairness on average by 4.22% and 11.7% respectively compared to Thread Cluster Memory scheduling (TCM) (previous work providing the best system throughput and fairness). Our newly proposed technique adds negligible area and logic overhead to the Memory Controller compared to the benefits on the system performance.
Keywords :
DRAM chips; multi-threading; multiprocessing systems; processor scheduling; storage management; 8-core system; TB-LMI; area overhead; chip-multiprocessor system; logic overhead; main-memory sharing; memory access; memory contention; memory controllers; multiple concurrently executing applications; multiple concurrently executing threads; multiprogrammed workloads; performance analysis; queue sizes; system fairness; system throughput; system throughput improvement; thread prioritization; time-based least memory intensive scheduling; unfairness limitation; Bandwidth; Benchmark testing; Instruction sets; Memory management; Random access memory; Registers; Throughput; Memory Controller; Memory Interference; Multi-core; Shared Resources;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Embedded Multicore/Manycore SoCs (MCSoc), 2014 IEEE 8th International Symposium on
Conference_Location :
Aizu-Wakamatsu
Type :
conf
DOI :
10.1109/MCSoC.2014.50
Filename :
6949487
Link To Document :
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