Design of low power and high speed ripple carry adder

In applications such as Digital Signal Processing architecture, microprocessor and microcontroller, full adder circuit plays an important role. Performance criteria for the logic styles are circuit speed, area and power dissipation. The major goal that requires ultimate attention is power consumption. Hence adders are designed in such a way to reduce the propagation delay which is also a cause for power consumption. Here two new designs adopted for low power and high speed ripple carry adder featuring Gate Diffusion Input (GDI) structure and Hybrid CMOS logic style. The hybrid logic style is employed in order to achieve a wide range of applications. The Gate-Diffusion-Input Multiplexer full adder (GDI-MUX) design eliminates the need of XOR/XNOR gates for designing full adder cell. The performance parameters such as area, delay, power and Power-Delay-Product (PDP) were analyzed using SPICE.