DocumentCode
1471691
Title
A Noise Filtering Technique for Fractional- 
Frequency Synthesizers
Author
Hung, Chao-Ching ; Liu, Shen-Iuan
Author_Institution
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Volume
58
Issue
3
fYear
2011
fDate
3/1/2011 12:00:00 AM
Firstpage
139
Lastpage
143
Abstract
A noise filtering technique for fractional-N frequency synthesizers (FNFSs) is presented. The noise filter is based on an integer-N (N = 1) phase-locked loop that is placed in a feedback path of an FNFS. By adopting the noise filter, out-of-band quantization noise of a high-order delta-sigma modulator is suppressed. In addition, folded noise due to nonlinearity of a phase/frequency detector (PFD) and a charge pump is improved by reducing phase errors at PFDs. An FNFS using the noise filter is fabricated in 90-nm complementary metal-oxide-semiconductor technology. Its die area is 950 by 950 μm, and its power consumption is 30 mW for a supply voltage of 1 V. The frequency resolution of this FNFS is less than 1 Hz.
Keywords
CMOS logic circuits; charge pump circuits; circuit feedback; delta-sigma modulation; digital phase locked loops; frequency synthesizers; interference suppression; low-power electronics; phase detectors; quantisation (signal); PFD; charge pump; complementary metal-oxide-semiconductor technology; fractional-N frequency synthesizer; high-order delta-sigma modulator; integer-N phase-locked loop; noise filtering technique; noise suppression; out-of-band quantization noise; phase-frequency detector; power 30 mW; power consumption; size 90 nm; voltage 1 V; Frequency synthesizers; Phase frequency detector; Phase noise; Quantization; Transfer functions; Voltage-controlled oscillators; Folded noise; frequency synthesizer; quantization noise filtering;
fLanguage
English
Journal_Title
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher
ieee
ISSN
1549-7747
Type
jour
DOI
10.1109/TCSII.2011.2110390
Filename
5730480
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