Title :
The planar 6H-SiC ACCUFET: a new high-voltage power MOSFET structure
Author :
Shenoy, P.M. ; Baliga, B. Jayant
Author_Institution :
North Carolina State Univ., Raleigh, NC, USA
Abstract :
A novel planar accumulation channel SiC MOSFET structure is reported in this paper. The problems of gate oxide rupture and poor channel conductance previously reported in SiC UMOSFETs are solved by using a buried P/sup +/ layer to shield the channel region. The fabricated 6H-SiC unterminated devices had a blocking voltage of 350 V with a specific on-resistance of 18 m/spl Omega/.cm2 at room temperature for a gate bias of only 5 V. This measured specific on-resistance is within 2.5× of the value calculated for the epitaxial drift region (10/sup 16/ cm/sup -3/, 10 μm), which is capable of supporting 1500 V.
Keywords :
accumulation layers; buried layers; electric resistance; ion implantation; power MOSFET; semiconductor device testing; silicon compounds; wide band gap semiconductors; 350 V; 5 V; SiC; blocking voltage; buried P/sup +/ layer; channel conductance; channel region shielding; current saturation; epitaxial drift region; gate bias; gate oxide rupture; high-voltage power MOSFET structure; planar 6H-SiC ACCUFET; planar accumulation channel SiC MOSFET structure; room temperature; specific on-resistance; unterminated devices; Breakdown voltage; Electric breakdown; Electrons; Fabrication; MOSFET circuits; Power MOSFET; Region 10; Silicon carbide; Temperature;
Journal_Title :
Electron Device Letters, IEEE
