DocumentCode :
147347
Title :
On a domain block based mechanism to mitigate DoS attacks on shared caches in asymmetric multiprocessing multi operating systems
Author :
Schnarz, Pierre ; Fischer, Claudia ; Wietzke, Joachim ; Stengel, Ingo
Author_Institution :
Dept. of Comput. Sci., Univ. of Appl. Sci. Darmstadt, Darmstadt, Germany
fYear :
2014
fDate :
13-14 Aug. 2014
Firstpage :
1
Lastpage :
8
Abstract :
Asymmetric multiprocessing (AMP) based multi-OSs are going to be established in future to enable parallel execution of different functionalities while fulfilling requirements for real-time, reliability, trustworthiness and security. Especially for in-car multimedia systems, also known as In-Vehicle Infotainment (IVI) systems, the composition of different OS-types onto a system-on-chip (SoC) offers a wide variety of advantages in embedded system development. However, the asymmetric paradigm, which implies the division and assignment of every hardware resource to OS-domains, is not applicable to every part of a system-on-chip (SoC). Caches are often shared between multiple processors on multi processor SoCs (MP-SoC). According to their association to the main memory, OSs running on the processor cores are naturally vulnerable to DoS attacks. An adversary who has compromised one of the OS-domains is able to attack an arbitrary memory location of a co-OS-domain. This introduces performance degradations on victim´s memory accesses. In this work a method is proposed which prohibits the surface for interference, introduced by the association of cache and main memory. Therefore, the contribution of this article is twofold. It introduces an attack vector, by deriving an algorithm from the cache way associativity, to affect the co-OSs running on the same platform. Using this vector it is shown that the mapping of contiguous memory blocks intensifies the effect. Subsequently, a memory mapping method is proposed which mitigates the interference effects of cache coherence. The approach is evaluated by a proof-of-concept implementation, which illustrates the performance impact of the attack and the countermeasure, respectively. The method enables a more reliable implementation of AMP-based multi-OSs on MP-SoCs using shared caches without the need to modify the hardware layout.
Keywords :
cache storage; computer network security; embedded systems; multimedia systems; operating systems (computers); shared memory systems; storage management; system-on-chip; AMP based multiOSs; DoS attacks; IVI systems; MP-SoC; arbitrary memory location; asymmetric multiprocessing multioperating systems; attack vector; cache way associativity; domain block based mechanism; embedded system development; in-car multimedia systems; in-vehicle infotainment systems; memory blocks; memory mapping method; multiprocessor SoCs; proof-of-concept implementation; shared caches; system-on-chip; Computer architecture; Computer crime; Hardware; Interference; Program processors; System-on-chip; Vectors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Information Security for South Africa (ISSA), 2014
Conference_Location :
Johannesburg
Print_ISBN :
978-1-4799-3383-9
Type :
conf
DOI :
10.1109/ISSA.2014.6950494
Filename :
6950494
Link To Document :
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