Title :
Collateral ASIC test
Author :
Bailey, Al ; Lada, Tim ; Preston, Jim
Author_Institution :
Alcatel Network Syst., MS, USA
Abstract :
Boundary scan techniques fall short in testing ASICs embedded in printed-board assemblies. By providing a new interconnect, this technique extends the benefits of boundary scan to ASICs whether they incorporate the Bscan interface or not
Keywords :
application specific integrated circuits; integrated circuit testing; ASICs; boundary scan; printed-board assemblies; testing ASICs; Application specific integrated circuits; Assembly; Built-in self-test; Circuit testing; Clocks; Integrated circuit interconnections; Logic circuits; Logic design; Logic testing; Multiplexing;
Journal_Title :
Design & Test of Computers, IEEE
