DocumentCode
1475697
Title
MRC-Based RNS Reverse Converters for the Four-Moduli Sets
and 

Author
Sousa, Leonel ; Antão, Samuel
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. Tec. de Lisboa, Lisbon, Portugal
Volume
59
Issue
4
fYear
2012
fDate
4/1/2012 12:00:00 AM
Firstpage
244
Lastpage
248
Abstract
The moduli set {2n + 1,2n - 1,2n, 22n+1 -1} has been recently proposed for supporting residue number systems with dynamic ranges of 5n bits. In this brief, we suggest modifying this moduli set to {2n + 1,2n - 1,2n, 22n+1 -1},in order to enlarge the dynamic range to 6n bits. We propose a method that unifies the design of efficient reverse converters for the original and the modified moduli sets. A unified architecture was derived to design individual reverse converters for each moduli set or to achieve a single configurable reverse converter. Experimental results show that the delay of the converters designed with the proposed method and implemented on a 65-nm CMOS integrated circuit is improved by 12% on average. Moreover, the product of the area with the square of the delay is improved up to 25% and 21%, when compared to the related state of the art and values of n between 6 and 32, for dynamic ranges of 5n and 6n bits, respectively.
Keywords
CMOS logic circuits; convertors; delay circuits; integrated circuit design; residue number systems; CMOS integrated circuit; MRC-based RNS reverse converters; moduli sets; residue number systems; single configurable reverse converter; size 65 nm; unified architecture; Adders; Application specific integrated circuits; Computer architecture; Delay; Dynamic range; Field programmable gate arrays; Application-specific integrated circuit (ASIC); computer arithmetic; residue number systems (RNSs); reverse converter;
fLanguage
English
Journal_Title
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher
ieee
ISSN
1549-7747
Type
jour
DOI
10.1109/TCSII.2012.2188456
Filename
6172562
Link To Document