Linearized Dual-Band Power Amplifiers With Integrated Baluns in 65 nm CMOS for a 2 $, \times ,$ 2 802.11n MIMO WLAN SoC

Fully integrated dual-band power amplifiers with on-chip baluns for 802.11n MIMO WLAN applications are presented. With a 3.3 V supply, the PAs produce a saturated output power of 28.3 dBm and 26.7 dBm with peak drain efficiency of 35.3% and 25.3% for the 2.4 GHz and 5 GHz bands, respectively. By utilizing multiple fully self-contained linearization algorithms, an EVM of -25 dB is achieved at 22.4 dBm for the 2.4 GHz band and 20.5 dBm for the 5 GHz band while transmitting 54 Mbs OFDM. The chip is fabricated in standard 65 nm CMOS and the PAs occupy 0.31 mm² (2.4 GHz) and 0.27 mm² (5 GHz) area. To examine the reliability of the PAs, accelerated aging tests are performed for several hundreds parts without a single failure.