Fast modeling technique for nano scale CMOS inverter and propagation delay estimation

this paper proposes a new approach for designing the output waveform nanoscale CMOS inverter using the unit step input. The output waveform is obtained by solving the corresponding differential equations of the circuit. Various phenomena due to Short Channel Effects are included in the equation to achieve more accurate model. Based on this model, the propagation delay time for the input is estimated and used to get the ramp input propagation delay based on its deviation with step input propagation delay. This method is used to avoid the overhead in the CPU execution time during simulation process for huge number of inverters. The evaluations of the proposed model results give very good agreement when compared with BSIM4 level 54 model using HSPICE.