DocumentCode
1480153
Title
How to estimate DSP processor performance
Author
Lapsley, Phil ; Blalock, Garrick
Author_Institution
Berkeley Design Technol. Inc., Fremont, CA, USA
Volume
33
Issue
7
fYear
1996
fDate
7/1/1996 12:00:00 AM
Firstpage
74
Lastpage
78
Abstract
The market for products based on digital signal processing (DSP) technology-wireless communication devices and PC multimedia peripherals, for example-is growing rapidly. Semiconductor manufacturers have responded to this demand with a bewildering array of DSP processors. Selecting the best one for a given application presents a difficult and time-consuming challenge for DSP system designers. Simple, familiar performance measures like MIPS and MOPS are misleading and neglect factors like memory usage, power consumption and application execution time. Complex alternatives-such as application benchmarks-suffer from limitations that virtually preclude fair comparisons. Fortunately, a compromise methodology that combines algorithm kernel benchmarking with application profiling yields good estimates of processor performance weighted to the target application
Keywords
computational complexity; digital signal processing chips; operating system kernels; performance evaluation; DSP processor; algorithm kernel benchmarking; application execution time; application profiling; digital signal processing; memory usage; performance estimation; power consumption; Communications technology; Digital signal processing; Energy consumption; Kernel; Manufacturing processes; Multimedia systems; Power measurement; Semiconductor device manufacture; Signal processing algorithms; Time measurement;
fLanguage
English
Journal_Title
Spectrum, IEEE
Publisher
ieee
ISSN
0018-9235
Type
jour
DOI
10.1109/6.526871
Filename
526871
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