A first-order current-steering sigma-delta modulator

Author

Comino, Vittorio ; Steyaert, Michel S J ; Temes, Gabor C.

Author_Institution

Analog Devices, Norwood, MA, USA

Volume

26

Issue

3

fYear

1991

fDate

3/1/1991 12:00:00 AM

Firstpage

176

Lastpage

183

Abstract

A new architecture is presented for a first-order sigma-delta (ΣΔ) modulator. The system achieves a high sampling frequency, can be used as a building block for higher-order modulators, and uses circuit techniques that are largely independent of a specific technology. The key features of this implementation are that it operates in a continuous-time (as opposed to switched) mode and does not need feedback amplifiers. To test the validity of the concept, the system was realized in 2-μm, n-well, double-metal, single-poly technology. It has a measured resolution of 9 b and a linearity of 13 b at a clock frequency of 20 MHz with an oversampling ratio of 128. It operates from a power supply of ±2.5 V with a power consumption of 3 mW. The circuit occupies an area of 0.92 mm²

Keywords

delta modulation; modulators; monolithic integrated circuits; 2 micron; 20 MHz; 3 mW; circuit techniques; clock frequency; continuous-time mode; current-steering sigma-delta modulator; n-well double-metal technology; oversampling ratio; power consumption; power supply; sampling frequency; single-poly technology; Circuit testing; Clocks; Delta-sigma modulation; Energy consumption; Feedback amplifiers; Frequency measurement; Linearity; Power supplies; Sampling methods; System testing;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.74994

Filename

74994