Low Energy Magnetic Domain Wall Logic in Short, Narrow, Ferromagnetic Wires

Author

Currivan, J.A. ; Youngman Jang ; Mascaro, M.D. ; Baldo, M.A. ; Ross, C.A.

Author_Institution

Harvard Univ., Cambridge, MA, USA

Volume

3

fYear

2012

fDate

7/4/1905 12:00:00 AM

Firstpage

3000104

Lastpage

3000104

Abstract

We present circuit simulation results of an implementation of universal logic that operates at low switching energy. Information is stored in the position of a single domain wall in a thin, short ferromagnetic wire. The gate is switched by current-driven domain wall motion, and information is read out using a magnetic tunnel junction. The inputs and outputs of the device are currents controlled by voltage clocks, making it compatible with CMOS. Using devices that operate at 100-1 mV, we simulate a shift register circuit and a full-adder circuit. The simulations show that the magnetic logic gates can operate at lower switching energy than CMOS electronics.

Keywords

CMOS logic circuits; circuit simulation; ferromagnetic materials; logic gates; magnetic domain walls; magnetic switching; magnetic tunnelling; shift registers; CMOS; domain wall motion; ferromagnetic wires; full-adder circuit simulation; low switching energy; magnetic domain wall logic; magnetic logic gates; magnetic tunnel junction; shift register circuit simulation; single domain wall; voltage 100 mV to 1 mV; voltage clocks; CMOS integrated circuits; Clocks; Logic gates; Magnetic domains; Magnetic tunneling; Perpendicular magnetic anisotropy; Wires; Spin electronics; domain wall; magnetic logic; magneto-electronics;

fLanguage

English

Journal_Title

Magnetics Letters, IEEE

Publisher

ieee

ISSN

1949-307X

Type

jour

DOI

10.1109/LMAG.2012.2188621

Filename

6177298