• DocumentCode
    1486460
  • Title

    Effects of multithreading on cache performance

  • Author

    Kwak, Hantak ; Lee, Ben ; Hurson, Ali R. ; Yoon, Suk-Han ; Hahn, Woo-Jong

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA
  • Volume
    48
  • Issue
    2
  • fYear
    1999
  • fDate
    2/1/1999 12:00:00 AM
  • Firstpage
    176
  • Lastpage
    184
  • Abstract
    As the performance gap between processor and memory grows, memory latency becomes a major bottleneck in achieving high processor utilization. Multithreading has emerged as one of the most promising and exciting techniques used to tolerate memory latency by exploiting thread-level parallelism. The question, however, remains as to how effective multithreading is on tolerating memory latency. The performance of multithreading is not only affected by the overlapping of memory latency with useful computation, but also strongly depends on the cache behavior and the overhead of multithreading (e.g., thread management and context-switch costs). In particular, multithreading affects the behavior of caches, and, thus, the overall performance in a nontrivial fashion. To study these issues, this paper presents the Multithreaded Virtual Processor (MVP) model. MVP integrates the multithreaded programming paradigm and a modern superscalar processor with support for fast context switching and thread scheduling. Our studies with MVP show that, in general, the performance improvements are obtained not only by tolerating memory latency but also lower cache miss rates due to exploitation of data locality. However, multithreading creates an additional stress on the memory hierarchy caused by the interference among threads. Also, the dynamic behavior of multithreaded execution hinders the instruction locality that results in a high number of misses in the L1 instruction cache
  • Keywords
    cache storage; instruction sets; multi-threading; software performance evaluation; L1 instruction cache; cache behavior; cache performance; dynamic behavior; memory latency; multithreaded programming paradigm; multithreaded virtual processor model; multithreading; performance improvements; superscalar processor; thread-level parallelism; Computer Society; Costs; Delay; Memory management; Multithreading; Parallel processing; Processor scheduling; Stress; Switches; Yarn;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/12.752659
  • Filename
    752659