Title :
Low-power CMOS with subvolt supply voltages
Author_Institution :
Dept. of Electr. Eng., Virginia Univ., Charlottesville, VA, USA
fDate :
4/1/2001 12:00:00 AM
Abstract :
We first present a circuit taxonomy along the space and time dimensions, which is useful for classifying generic low-power techniques, followed by an analysis of optimal power supply and threshold voltages and transistor sizing for minimizing the energy-delay product of a class of complementary metal-oxide-semiconductor (CMOS) digital circuits.
Keywords :
CMOS digital integrated circuits; VLSI; integrated circuit design; low-power electronics; power supply circuits; CMOS digital circuits; circuit taxonomy; energy-delay product; generic low-power techniques; low-power CMOS; optimal power supply; space dimensions; subvolt supply voltages; threshold voltages; time dimensions; transistor sizing; CMOS digital integrated circuits; Design optimization; Digital circuits; Energy consumption; Frequency; Power supplies; Subthreshold current; Taxonomy; Threshold voltage; Very large scale integration;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
