Abstract :
With the advent of the so-called system on a chip, or superchip, telling whether a complex integrated circuit is free of manufacturing flaws has become more difficult than ever before. Few believe that any automatic test equipment (ATE) machine of known architecture will be able to test tomorrow´s chips as accurately or as thoroughly as yield and reliability considerations demand. It is for this this reason that different approaches to chip testing such as design for testability (DFT), automatic test pattern generation (ATPG), built-in self-test (BIST) an internal scan design are currently being developed
Keywords :
automatic test pattern generation; built-in self test; design for testability; integrated circuit testing; automatic test equipment; automatic test pattern generation; built-in self test; design for testability; integrated circuit testing; internal scan design; superchip; system-on-a-chip; Automatic test pattern generation; Automatic testing; Circuit testing; Costs; Electronics industry; Integrated circuit testing; Logic testing; Semiconductor device testing; Software testing; System testing;
