DocumentCode :
1502409
Title :
Introducing Tobus: the system bus in the TRON architecture
Author :
Sakamura, K. ; Sano, Ryuichi ; Honma, Kenta
Author_Institution :
Dept. of Inf. Sci., Tokyo Univ., Japan
Volume :
8
Issue :
2
fYear :
1988
fDate :
4/1/1988 12:00:00 AM
Firstpage :
47
Lastpage :
59
Abstract :
The Japanese TRON (The Real-Time Operating Nucleus) project has as its goal the design of a computer architecture that includes a CPU, operating systems and a man-machine interface. Peripherals are portable because TRON designers set a board-level standard for the system bus protocol. The end product transfers data at rates from 50 M to 100 M bytes/s. A description is given of Tobus, the system bus designed to fit the standard. Bus arbitration, data transfer and interrupt-handling are discussed.<>
Keywords :
computer architecture; computer interfaces; interrupts; real-time systems; research initiatives; standards; Japan; TRON architecture; The Real-Time Operating Nucleus; Tobus; bus arbitration; data transfer; interrupt-handling; standard; system bus; Application software; Central Processing Unit; Computer architecture; Data processing; Hardware; Microelectronics; Operating systems; Protocols; System buses; Very large scale integration;
fLanguage :
English
Journal_Title :
Micro, IEEE
Publisher :
ieee
ISSN :
0272-1732
Type :
jour
DOI :
10.1109/40.529
Filename :
529
Link To Document :
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