DocumentCode :
1504770
Title :
A general interprocedural framework for placement of split-phase large latency operations
Author :
Agrawal, Gagan
Author_Institution :
Dept. of Comput. & Inf. Sci., Delaware Univ., Newark, DE, USA
Volume :
10
Issue :
4
fYear :
1999
fDate :
4/1/1999 12:00:00 AM
Firstpage :
394
Lastpage :
413
Abstract :
Overlapping split-phase large latency operations with computations is a standard technique for improving performance on modern architectures. In this paper, we present a general interprocedural technique for overlapping such accesses with computation. We have developed an Interprocedural Balanced Code Placement (IBCP) framework, which performs analysis on arbitrary recursive procedures and arbitrary control flow and replaces synchronous operations with a balanced pair of asynchronous operations. We have evaluated this scheme in the context of overlapping I/O operations with computation. We demonstrate how this analysis is useful for applications which perform frequent and large accesses to disks, including applications which snapshot or checkpoint their computations or out-of-core applications
Keywords :
data flow analysis; memory architecture; performance evaluation; Interprocedural Balanced Code Placement; control flow; interprocedural technique; large latency operations; overlapping; overlapping I/O operations; performance; recursive procedures; split-phase; Computer architecture; Data analysis; Data structures; Degradation; Delay; Performance analysis; Random access memory; Read-write memory; Satellites; Writing;
fLanguage :
English
Journal_Title :
Parallel and Distributed Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1045-9219
Type :
jour
DOI :
10.1109/71.762818
Filename :
762818
Link To Document :
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