Tool for algorithms mapping with help of signal-flow graph approach

Author

Mego, R. ; Fryza, T.

Author_Institution

Dept. of Radio Electron., Brno Univ. of Technol., Brno, Czech Republic

fYear

2014

fDate

15-16 April 2014

Firstpage

1

Lastpage

4

Abstract

This paper deals with the methods of programming the digital signal processors based on very long instruction word (VLIW) architecture. It compares 3 most used methods using a common algorithm in signal processing domain. The comparison shows the advantages and disadvantages of these methods. The paper also introduces the new method of programming VLIW processors. This method could describe any digital signal processing algorithm with the signal-flow graph instead of the sequential definition. The result of the system is the generated low level source code in semi optimal stage.

Keywords

digital signal processing chips; multiprocessing systems; signal flow graphs; VLIW architecture; VLIW processors; algorithms mapping; digital signal processing algorithm; digital signal processors; low level source code; semi optimal stage; sequential definition; signal processing domain; signal-flow graph approach; very long instruction word; Assembly; Computer architecture; Program processors; Programming; Registers; Signal processing algorithms; VLIW; compiller; digital signal processing; instruction mapping; signal-flow graph; very long instruction word (VLIW);

fLanguage

English

Publisher

ieee

Conference_Titel

Radioelektronika (RADIOELEKTRONIKA), 2014 24th International Conference

Conference_Location

Bratislava

Print_ISBN

978-1-4799-3714-1

Type

conf

DOI

10.1109/Radioelek.2014.6828429

Filename

6828429