Integration of a 50 V BVCEO SiGe:C HBT into a 0.25 μm SiGe:C BiCMOS platform

We demonstrate the modular integration of a high-voltage SiGe:C HBT with 50V BVCEO into a low cost industrial 0.25 μm SiGe:C BICMOS process. The chosen approach of a lateral drift region is very similar to the construction principles applied to the construction of integrated high voltage LDMOS transistors. The construction of a lateral drift region avoids deep collector wells formed by ion implantation with very high implantation energy or epitaxial layer growth. In the chosen approach the emitter and base construction of the standard SiGe:C HBTs, available in the underlying BiCMOS process, remains unchanged. The BVCEO*ft product of the new device reaches values of 200 VGHz.