DocumentCode
150727
Title
A low voltage inverter-based continuous-time sigma delta analog-to-digital converter in 65nm CMOS technology
Author
Essawy, A. ; Ismail, A.
Author_Institution
Si-ware Syst., Egypt
fYear
2014
fDate
4-6 May 2014
Firstpage
1
Lastpage
4
Abstract
In this work an inverted-based low-voltage implementation for continuous-time sigma delta analog-to-digital converters is proposed. The proposed implementation is applied to a third-order single loop modulator. The loop filter is implemented using active RC integrators. A 50 dB SNDR is achieved for a signal bandwidth of 2 MHz and sampling frequency of 100 MHz, while consuming 1 mA from 0.75 V, supply in 65 nm CMOS technology.
Keywords
CMOS integrated circuits; continuous time filters; invertors; low-power electronics; sigma-delta modulation; CMOS technology; CT loop filter; active RC integrators; analog-to-digital converter; bandwidth 2 MHz; continuous-time converter; current 1 mA; frequency 100 MHz; low voltage inverter; sigma delta converter; size 65 nm; third-order single loop modulator; voltage 0.75 V; CMOS integrated circuits; CMOS technology; Inverters; Low voltage; Modulation; Noise; Solid state circuits; continuous time; inverter-based; low voltage; sigma delta;
fLanguage
English
Publisher
ieee
Conference_Titel
Faible Tension Faible Consommation (FTFC), 2014 IEEE
Conference_Location
Monaco
Type
conf
DOI
10.1109/FTFC.2014.6828599
Filename
6828599
Link To Document