Synthesis of a new manufacturable high-quality graded gate oxide for sub-0.2 μm technologies

Graded gate oxide process involves a two-step synthesis of growing an oxide at a temperature above the viscoelastic temperature (T_VE ) onto a pregrown low temperature thermally grown SiO₂ layer to form a composite graded SiO₂ structure. The cooling rate is carefully modulated near T_VE~925°C to enhance growth induced stress relaxation. The pregrown SiO₂ layer provides grading and is a sink for stress accommodation for the final high temperature SiO₂ forming the interface. Both grading and modulated cooling generate a strain-free and planar Si/SiO₂ interface. Such an interface delivers significant enhancement in all aspects of device reliability and performance. These oxides are of very high-quality, robust, and manufacturable with a process capability index, C_pk>1.5. Graded gate oxide is already in the primary path of our 0.16 μm and 0.12 μm technologies