DocumentCode :
1527153
Title :
Neural network-based L1-norm optimisation approach for fault diagnosis of nonlinear circuits with tolerance
Author :
He, Y. ; Sun, Y.
Author_Institution :
Sch. of Electr. & Inf. Eng., Hunan Univ., Changsha, China
Volume :
148
Issue :
4
fYear :
2001
fDate :
8/1/2001 12:00:00 AM
Firstpage :
223
Lastpage :
228
Abstract :
The paper deals with fault isolation in nonlinear analogue circuits with tolerance under an insufficient number of independent voltage measurements. The L1-norm optimisation problem for different scenarios of nonlinear fault diagnosis is formulated with a new fast method being presented. How to solve the L1-norm optimisation problem is discussed and a new neural network-based approach for solving the nonlinear constrained L1-norm optimisation problem is proposed and utilised in locating the most likely faulty elements in nonlinear circuits. The validity of the proposed method is verified and simulation examples are presented
Keywords :
analogue circuits; circuit analysis computing; circuit optimisation; fault diagnosis; neural nets; nonlinear network analysis; analogue circuits; fault diagnosis; faulty elements; independent voltage measurements; neural network-based L1-norm optimisation approach; nonlinear circuits;
fLanguage :
English
Journal_Title :
Circuits, Devices and Systems, IEE Proceedings -
Publisher :
iet
ISSN :
1350-2409
Type :
jour
DOI :
10.1049/ip-cds:20010418
Filename :
948395
Link To Document :
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