DocumentCode
1528079
Title
Corrections to “Settling Time Optimization for Three-Stage CMOS Amplifier Topologies” [Dec 09 2569-2582]
Author
Pugliese, Andrea ; Amoroso, Francesco Antonio ; Cappuccino, Gregorio ; Cocorullo, Giuseppe
Author_Institution
Department of Electronics/Computer Science/Systems, University of Calabria, Rende (CS), Italy
Volume
57
Issue
7
fYear
2010
fDate
7/1/2010 12:00:00 AM
Firstpage
1812
Lastpage
1813
Abstract
In the above titled paper (ibid., vol. 56, no. 12, pp. 2569-2582, Dec. 09), Tables IV and VI must be replaced. Due to a production error, the correct version of Table IV was not included, and Table VI contained an error in the PM value for NMC topology (6th row, 3rd column), The correct versions of Tables IV and VI are presented here.
fLanguage
English
Journal_Title
Circuits and Systems I: Regular Papers, IEEE Transactions on
Publisher
ieee
ISSN
1549-8328
Type
jour
DOI
10.1109/TCSI.2010.2055090
Filename
5499443
Link To Document