• DocumentCode
    15310
  • Title

    Memory and Information Processing in Neuromorphic Systems

  • Author

    Indiveri, Giacomo ; Shih-Chii Liu

  • Author_Institution
    Inst. of Neuroinf., Univ. & ETH Zurich, Zurich, Switzerland
  • Volume
    103
  • Issue
    8
  • fYear
    2015
  • fDate
    Aug. 2015
  • Firstpage
    1379
  • Lastpage
    1397
  • Abstract
    A striking difference between brain-inspired neuromorphic processors and current von Neumann processor architectures is the way in which memory and processing is organized. As information and communication technologies continue to address the need for increased computational power through the increase of cores within a digital processor, neuromorphic engineers and scientists can complement this need by building processor architectures where memory is distributed with the processing. In this paper, we present a survey of brain-inspired processor architectures that support models of cortical networks and deep neural networks. These architectures range from serial clocked implementations of multineuron systems to massively parallel asynchronous ones and from purely digital systems to mixed analog/digital systems which implement more biological-like models of neurons and synapses together with a suite of adaptation and learning mechanisms analogous to the ones found in biological nervous systems. We describe the advantages of the different approaches being pursued and present the challenges that need to be addressed for building artificial neural processing systems that can display the richness of behaviors seen in biological systems.
  • Keywords
    neural nets; storage management; artificial neural processing systems; biological nervous systems; brain-inspired processor architectures; cortical networks; deep neural networks; information processing; massively parallel asynchronous systems; memory processing; mixed analog-digital systems; multineuron systems serial clocked implementations; purely digital systems; Biological neural networks; Brain modeling; Computer architecture; Field programmable gate arrays; Information processing; Memory management; Neuromorphics; Neurons; Program processors; Convolutional networks; VLSI; deep neural networks (DNNs); event-based computation; learning; massively parallel; memristor; neuromorphic computing; plasticity; spike-timing-dependent plasticity (STDP); spiking neural network (SNN); von Neumann bottleneck;
  • fLanguage
    English
  • Journal_Title
    Proceedings of the IEEE
  • Publisher
    ieee
  • ISSN
    0018-9219
  • Type

    jour

  • DOI
    10.1109/JPROC.2015.2444094
  • Filename
    7159144