Title :
Automating the design of SOCs using cores
Author :
Bergamaschi, Reinaldo A. ; Bhattacharya, Subhrajit ; Wagner, Ronaldo ; Fellenz, Colleen ; Muhlada, Michael ; White, Foster ; Daveau, Jean-Marc ; Lee, William R.
Abstract :
Assembling a system on a chip using IP blocks is an error-prone, labor-intensive, and time-consuming process. Emerging high-level tools can help by automating many of the design tasks
Keywords :
electronic design automation; high level synthesis; microprocessor chips; IP blocks; SOCs; cores; high-level tools; Assembly systems; LAN interconnection; Libraries; Logic; Manufacturing; Microelectronics; Pins; Protocols; System testing; System-on-a-chip;
Journal_Title :
Design & Test of Computers, IEEE
