Title :
A CCD programmable signal processor
Author :
Chiang, Alice M.
Author_Institution :
MIT Lincoln Lab., Lexington, MA, USA
fDate :
12/1/1990 12:00:00 AM
Abstract :
A generic large-coupled device (CCD) signal processor that performs 2.8-billion computations per second with a 10-MHz clock rate is described. The device´s concept, design, operation, performance, and applications are reviewed. A dynamic range greater than 42 dB has been demonstrated by the device. This processor can be used as a one-dimensional correlator, a two-dimensional matched filter or a two-layer neural net device. The device demonstrates the flexibility and computational power that is possible using CCD technology
Keywords :
charge-coupled device circuits; computerised signal processing; correlators; filters; neural nets; parallel processing; signal processing equipment; 10 MHz; CCD technology; analogue tapped delay line; large-coupled device; one-dimensional correlator; programmable signal processor; two-dimensional matched filter; two-layer neural net device; Charge coupled devices; Clocks; Computer architecture; Computer networks; Correlators; Dynamic range; Matched filters; Neural networks; Signal processing; Signal processing algorithms;
Journal_Title :
Solid-State Circuits, IEEE Journal of
