DocumentCode
154245
Title
Challenges to via middle TSV integration at sub-28nm nodes
Author
Kamineni, Himani Suhag ; Kannan, S. ; Alapati, Ramakanth ; Thangaraju, Sara ; Smith, D. ; Dingyou Zhang ; Shan Gao
Author_Institution
GLOBALFOUNDRIES, Inc., Malta, NY, USA
fYear
2014
fDate
20-23 May 2014
Firstpage
199
Lastpage
202
Abstract
This work presents the via middle TSV integration at sub-28 nm nodes using a new local interconnect scheme involving V0 vias. Various V0 schemes are presented along with their respective resistance, capacitance and leakage current data. The characterization and reliability results are presented through TSV daisy chain structures and MOL via chains.
Keywords
integrated circuit interconnections; leakage currents; three-dimensional integrated circuits; MOL via chains; TSV daisy chain structures; leakage current data; local interconnect scheme; size 28 nm; via middle TSV integration; Copper; Current measurement; Electrical resistance measurement; Leakage currents; Resistance; Through-silicon vias;
fLanguage
English
Publisher
ieee
Conference_Titel
Interconnect Technology Conference / Advanced Metallization Conference (IITC/AMC), 2014 IEEE International
Conference_Location
San Jose, CA
Print_ISBN
978-1-4799-5016-4
Type
conf
DOI
10.1109/IITC.2014.6831869
Filename
6831869
Link To Document