Title :
New logic circuits based on SFQ signals
Author :
Furuta, F. ; Suzuki, Y. ; Oya, E. ; Matsumoto, S. ; Akaike, H. ; Fujimaki, A. ; Hayakawa, H. ; Takai, Y.
Author_Institution :
Dept. of Quantum Eng., Nagoya Univ., Japan
fDate :
6/1/1999 12:00:00 AM
Abstract :
We propose new logic circuits based on Single Flux Quantum logic with Resettable Latch (SFQ-RL). This new logic enables us to initialize the whole circuit and realize an inverter easily. This initialization function is needed for general state machines, in addition, suppressing the failed operation caused by a trapped flux in storage loops. SFQ-RL logic consists of three primitives of gates, "Latch (L)-gate", "Copy(C)-gate" and "OR (O)-gate". L-gate is a kind of flip-flop gate. The difference from a conventional RSFQ latch, "RS-FF" is that L-gate can be reset without emitting an output pulse using "Initialize" pulse. Our numerical simulation shows that the bias margin of L-gate is /spl plusmn/8%. C-gate and O-gate correspond to "Splitter" and "Confluence Buffer" in RSFQ logic, respectively. Every logic function can be realized by only the three primitives. We confirmed the operations, "AND" and "OR" with reasonable margins and speeds by the numerical calculation. We have experimentally demonstrated the logic function such as OR based on SFQ-RL logic. We confirmed the normal operation of the gate with the bias margin of /spl plusmn/25.9%.
Keywords :
flip-flops; flux pinning; logic gates; sequential circuits; superconducting logic circuits; OR-gate; SFQ signals; bias margin; confluence buffer; copy-gate; flip-flop gate; general state machines; initialization function; inverter; latch-gate; logic function; resettable latch; single flux quantum logic; splitter; storage loops; supeconducting logic circuits; trapped flux; Digital systems; Energy consumption; Flip-flops; Josephson junctions; Latches; Logic circuits; Logic functions; Numerical simulation; Quantum computing; Thin film circuits;
Journal_Title :
Applied Superconductivity, IEEE Transactions on