Temperature-dependent bit-error rate of a clocked superconducting digital circuit

Author

Herr, Q.P. ; Johnson, M.W. ; Feldman, M.J.

Author_Institution

Dept. of Electr. & Comput. Eng., Rochester Univ., NY, USA

Volume

9

Issue

2

fYear

1999

fDate

6/1/1999 12:00:00 AM

Firstpage

3594

Lastpage

3597

Abstract

We measured the bit-error rate (BER) of an RS latch, a clocked SFQ circuit. A digital error-detection circuit was used to detect BER in the range unity to 10/sup -13/; below 10/sup -7/, the circuit was operated with a 12 GHz on-chip clock. BER was measured as a function of control current; both positive and negative control current was applied, leading to two distinct modes of error incidence. The error function curves extrapolate to 10/sup -80/ for optimal control current at a temperature of 5.5 K. Measurements were repeated over the range 3-7 K. Comparison to theoretical error-function estimates of BER indicate that the noise is strictly thermal.

Keywords

error detection; superconducting logic circuits; 12 GHz; 3 to 7 K; RS latch; SFQ circuit; bit error rate; clocked superconducting digital circuit; control current; error detection circuit; error function; temperature dependence; thermal noise; Bit error rate; Circuits; Clocks; Current measurement; Error correction; Estimation theory; Latches; Noise measurement; Optimal control; Temperature distribution;

fLanguage

English

Journal_Title

Applied Superconductivity, IEEE Transactions on

Publisher

ieee

ISSN

1051-8223

Type

jour

DOI

10.1109/77.783807

Filename

783807