DocumentCode
1554723
Title
A 2.5-V 12-b 54-Msample/s 0.25-μm CMOS ADC in 1-mm2 with mixed-signal chopping and calibration
Author
Van der Ploeg, Hendrik ; Hoogzaad, Gian ; Termeer, Henk A H ; Vertregt, Maarten ; Roovers, Raf L J
Author_Institution
Philips Res. Lab., Eindhoven, Netherlands
Volume
36
Issue
12
fYear
2001
fDate
12/1/2001 12:00:00 AM
Firstpage
1859
Lastpage
1867
Abstract
This paper describes a two-step analog-to-digital converter (ADC) with a mixed-signal chopping and calibration algorithm. The ADC consists primarily of analog blocks, which do not suffer from the matching limitations of active devices. The offset on two residue amplifiers limits the accuracy of the ADC. Background digital offset extraction and analog compensation is implemented to continuously remove the offset of these critical analog components. The calibrated two-step ADC achieves -70 dB THD in the Nyquist band, with a 2.5-V supply. The ADC is realized in standard single-poly 5-metal 0.25-μm CMOS, measures 1.0 mm2 , and dissipates 295 mW
Keywords
CMOS integrated circuits; analogue-digital conversion; calibration; choppers (circuits); harmonic distortion; mixed analogue-digital integrated circuits; 0.25 micron; 12 bit; 2.5 V; 295 mW; CMOS ADC; Nyquist band; THD; analog compensation; analog component; background digital offset extraction; calibration algorithm; mixed-signal chopping; residue amplifier; two-step architecture; Analog-digital conversion; CMOS technology; Calibration; Capacitors; Circuits; Energy consumption; Helium; Measurement standards; Power supplies; Signal resolution;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.972136
Filename
972136
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