• DocumentCode
    1554902
  • Title

    Skewing clock to decide races - double-edge-triggered flip-flop

  • Author

    Varma, P. ; Ramganesh, K.N.

  • Author_Institution
    IBM Indian Inst. of Technol., New Delhi, India
  • Volume
    37
  • Issue
    25
  • fYear
    2001
  • fDate
    12/6/2001 12:00:00 AM
  • Firstpage
    1506
  • Lastpage
    1507
  • Abstract
    A clock-skew-based methodology for deciding races that are ordinarily settled by making feedback paths weak or resistive is proposed. Applying this to earlier work, a new static, double-edge-triggered flip-flop is derived that shows significant gains in terms of reduced power, increased frequency, and reduced gate area
  • Keywords
    clocks; decision circuits; flip-flops; hazards and race conditions; clock skew; double-edge-triggered flip-flop; race decision circuit;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:20011036
  • Filename
    972179
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1554902