• DocumentCode
    1556519
  • Title

    On the measurement of parasitic capacitances of device with more than two external terminals using an LCR meter

  • Author

    Lin, Wallece W. ; Chan, Philip C.

  • Author_Institution
    Intel Corp., Santa Clara, CA, USA
  • Volume
    38
  • Issue
    11
  • fYear
    1991
  • fDate
    11/1/1991 12:00:00 AM
  • Firstpage
    2573
  • Lastpage
    2575
  • Abstract
    A general methodology of directly measuring parasitic capacitance using an LCR meter in devices with more than two terminals is discussed. It is concluded that the accuracy of the measurement cannot be guaranteed in such devices since it is dependent on the internal structure of the device. This is demonstrated using the conventional (bulk silicon) MOSFET structure, showing that substrate or well resistance could be the dominant factor limiting measurement accuracy of parasitic capacitances, such as gate-to-drain (source), drain-to-source, and drain (source)-to substrate (well) capacitances. The authors also conclude that for the silicon-on-insulator (SOI) MOSFET structure, a direct and accurate measurement is difficult to achieve, since the measurement accuracy is impeded by the floating substrate in the structure
  • Keywords
    capacitance measurement; insulated gate field effect transistors; semiconductor device testing; LCR meter; MOSFET; SOI structure; Si; bulk structure; floating substrate; measurement; multi-terminal devices; parasitic capacitances; Ammeters; Capacitance measurement; Current measurement; Impedance; MOSFET circuits; Monitoring; Parasitic capacitance; Silicon on insulator technology; Testing; Transistors;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.97429
  • Filename
    97429