• DocumentCode
    1557025
  • Title

    FIR Filter Synthesis Based on Interleaved Processing of Coefficient Generation and Multiplier-Block Synthesis

  • Author

    Kong, Byeong Yong ; Park, In-Cheol

  • Author_Institution
    Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea
  • Volume
    31
  • Issue
    8
  • fYear
    2012
  • Firstpage
    1169
  • Lastpage
    1179
  • Abstract
    An efficient filter synthesis algorithm is proposed to minimize the number of adders required in the design of finite-impulse response filters. Given a specification, a filter can be synthesized by conducting two main steps: coefficient generation and multiplier-block synthesis. While most of previous works have focused on only one of the steps, the proposed algorithm integrates the two steps in an interleaved manner so as to take into account the effect of multiplier-block synthesis in generating coefficients. In addition, the concept of sensitivity is developed to reduce the complexity of computing the variable ranges of coefficients. Experimental results show that the proposed algorithm outperforms previous algorithms in terms of adder cost and takes a relatively short computation time.
  • Keywords
    FIR filters; adders; computational complexity; network synthesis; FIR filter synthesis algorithm; adder; coefficient generation; computational complexity; finite-impulse response filter; interleaved processing; multiplier-block synthesis; Adders; Algorithm design and analysis; Complexity theory; Finite impulse response filter; Frequency response; Passband; Sensitivity; Adder cost; coefficient sensitivity; common subexpression; finite-impulse response (FIR) filter; multiplierless filter;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2012.2190826
  • Filename
    6238399