Title :
High-performance fully-depleted SOI RF CMOS
Author :
Chen, C.L. ; Spector, S.J. ; Blumgold, R.M. ; Neidhard, R.A. ; Beard, W.T. ; Yost, D.-R. ; Knecht, J.M. ; Chen, C.K. ; Fritze, M. ; Cerny, C.L. ; Cook, J.A. ; Wyatt, P.W. ; Keast, C.L.
Author_Institution :
Lincoln Lab., MIT, Lexington, MA, USA
Abstract :
A T-gate structure has been implemented in the fabrication of fully depleted silicon-on-insulator MOSFETs. The T-gate process is fully compatible with the standard CMOS and the resulting reduction of gate-resistance significantly improved the RF performance. Measured fmax is 76 GHz and 63 GHz for n- and p-MOSFET with 0.2-μm gate length, respectively. At 2 GHz, a minimum noise figure of 0.4 dB was measured on an n-MOSFET with the T-gate structure.
Keywords :
CMOS integrated circuits; UHF integrated circuits; integrated circuit metallisation; integrated circuit noise; silicon-on-insulator; 0.2 micron; 0.4 dB; 2 GHz; 63 GHz; 76 GHz; RF performance; T-gate process; T-gate structure; fabrication; fully-depleted SOI RF CMOS; gate-resistance reduction; low-noise performance; microwave MOSFET; n-MOSFET; p-MOSFET; standard CMOS process compatibility; CMOS process; Cutoff frequency; Etching; Fabrication; Laboratories; MOSFET circuits; Noise figure; Plugs; Radio frequency; Silicon on insulator technology;
Journal_Title :
Electron Device Letters, IEEE
