Title :
An ILP-based scheduling scheme for energy efficient high performance datapath synthesis
Author :
Mohanty, Saraju P. ; Ranganathan, N. ; Chappidi, Sunil K.
Author_Institution :
Dept. of Comput. Sci. & Eng., Univ. of South Florida, Tampa, FL, USA
Abstract :
In this paper, we describe an integer linear programming (ILP) based datapath scheduling algorithm which uses both multiple supply voltages and dynamic frequency clocking for power optimization. The scheduling technique assumes the number and type of different functional units as resource constraints and minimizes the energy delay product (EDP). The energy savings directly comes from the use of multiple supply voltages and the performance improvement from dynamic frequency clocking. The algorithm has been applied to various high level synthesis benchmark circuits under different resource constraints. The experimental results show that under various resource constraints using two supply voltage levels (5.0 V, 3.3 V), the average energy reduction is 55% and the average EDP reduction is 13%.
Keywords :
CMOS digital integrated circuits; VLSI; circuit CAD; data flow graphs; integer programming; integrated circuit design; linear programming; logic CAD; low-power electronics; minimisation; processor scheduling; 3.3 V; 5.0 V; ILP-based scheduling scheme; datapath scheduling algorithm; dynamic frequency clocking; energy delay product minimisation; energy efficient datapath synthesis; high level synthesis benchmark circuits; integer linear programming based algorithm; low power datapath synthesis; multiple supply voltages; power optimization; resource constraints; Circuits; Clocks; Delay; Dynamic programming; Energy efficiency; Frequency; High level synthesis; Integer linear programming; Scheduling algorithm; Voltage;
Conference_Titel :
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on
Print_ISBN :
0-7803-7761-3
DOI :
10.1109/ISCAS.2003.1206265