DocumentCode :
1562067
Title :
A novel hybrid pass logic with static CMOS output drive full-adder cell
Author :
Zhang, Mingvan ; Gu, Jiangmin ; Chang, Chip-Hong
Author_Institution :
Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore
Volume :
5
fYear :
2003
Abstract :
A novel design of a 1-bit full adder cell featuring a hybrid CMOS logic style is proposed. The simultaneous generation of XOR and XNOR outputs by pass logic is advantageously exploited in a novel complementary CMOS stage to produce full-swing and balanced outputs so that adder cells can be cascaded without buffer insertion. The increase in transistor count of the complementary CMOS stage is compensated by its reduction in layout complexity. Comparing with other 1-bit adder cells using different but uniform logic styles, simulation results show that it is very power efficient and has lower power-delay product over a wide range of voltages.
Keywords :
CMOS logic circuits; adders; digital arithmetic; integrated circuit layout; logic design; low-power electronics; XNOR outputs; XOR outputs; arithmetic logic unit; balanced outputs; complementary CMOS stage; embedded applications; full-swing outputs; high performance ALU; hybrid CMOS logic style; hybrid pass logic; layout complexity reduction; output drive full-adder cell; pass logic; power-delay product; simultaneous outputs generation; static CMOS full-adder cell; Adders; CMOS logic circuits; CMOS technology; Circuit simulation; Integrated circuit technology; Logic design; Logic devices; MOS devices; Switching circuits; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on
Print_ISBN :
0-7803-7761-3
Type :
conf
DOI :
10.1109/ISCAS.2003.1206266
Filename :
1206266
Link To Document :
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