Title :
1V 10-bit successive approximation ADC for low power biomedical applications
Author :
Chow, Hwang-Cherng ; Chen, Yi-Hung
Author_Institution :
Dept. & Grad. Inst. of Electron. Eng., Chang Gung Univ., Taoyuan
Abstract :
A low power 1 V 10-bit successive approximation analog-to-digital converter (SA-ADC) is presented for biomedical applications. In the DAC capacitor arrays of this SA-ADC a charge-recycling method for switching the capacitors is used. Besides, a 1 V rail-to-rail input comparator with both current driven bulk technique and offset cancellation is proposed. The complete 1 V ADC implemented in TSMC 0.18 um CMOS process has a signal-to-noise ratio of 58.5 dB and its effective number of bits is 9.4 based on post-layout simulations. The entire ADC power consumption is 32.6 uW for normal signals and 29.5 uW for ECG applications.
Keywords :
CMOS integrated circuits; analogue-digital conversion; biomedical electronics; electrocardiography; low-power electronics; medical signal processing; DAC capacitor array; TSMC CMOS process; analog-to-digital converter; charge-recycling method; current driven bulk technique; low power biomedical applications; rail-to-rail input comparator; size 0.18 mum; successive approximation ADC; switching capacitor; voltage 1 V; word length 10 bit; Analog-digital conversion; CMOS process; Capacitors; Energy consumption; Low voltage; Phased arrays; Rail to rail inputs; Recycling; Signal processing; Threshold voltage;
Conference_Titel :
Circuit Theory and Design, 2007. ECCTD 2007. 18th European Conference on
Conference_Location :
Seville
Print_ISBN :
978-1-4244-1341-6
Electronic_ISBN :
978-1-4244-1342-3
DOI :
10.1109/ECCTD.2007.4529570
