A Simulation Study of SoI-Like Bulk Silicon MOSFET With Improved Performance

Author

Ying Wang ; Xiao-Wen He ; Chan Shan

Author_Institution

Coll. of Inf. & Commun. Eng., Harbin Eng. Univ., Harbin, China

Volume

61

Issue

9

fYear

2014

fDate

Sept. 2014

Firstpage

3339

Lastpage

3344

Abstract

A silicon-on-insulator-(SoI)-like bulk silicon (SL-BS) MOSFET structure is proposed and compared against an fully depleted SoI MOSFET using 2-D numerical simulations. The SL-BS MOSFET contains a p/n-/p structure, with n- is made of 4 H-SiC. This n- layer is fully depleted through the built-in potential of two p-n junctions. Simulations indicated that the proposed structure is better than SoI in short channel effects simulation except the threshold rolloff, and equivalent with SoI in single-event upset properties. The SL-BS MOSFET exhibits no significant self-heating effect. Overall, the simulation results indicated the proposed structure is suitable for replacing SoI technology for applications in environments with high-dose radiation.

Keywords

MOSFET; p-n junctions; radiation hardening (electronics); semiconductor device models; silicon compounds; wide band gap semiconductors; 2D numerical simulations; SL-BS MOSFET; SiC; SoI-like bulk silicon MOSFET; built-in potential; fully depleted SoI MOSFET; high-dose radiation; p-n junctions; p/n-/p structure; short channel effects simulation; silicon-on-insulator; single-event upset properties; threshold rolloff; Logic gates; MOSFET; Performance evaluation; Silicon; Silicon carbide; Substrates; Threshold voltage; 4H-SiC; bulk silicon (BS); p/n-/p+; p/n??/p+; self-heating effect (SHE); short channel effects (SCE); silicon-on-insulator (SoI)-like; single-event upset (SEU);

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2014.2340406

Filename

6867313