Circuit techniques for CMOS multiple-antenna transceivers

Author

Allstot, David J. ; Aniruddhan, Sankaran ; Banerjee, Gaurab ; Chu, Min ; Li, Xiaoyong ; Paramesh, Jeyanandh ; Shekhar, Sudip ; Soumyanath, K.

Author_Institution

Dept. of Electr. Eng., Univ. of Washington, Seattle, WA, USA

fYear

2005

Firstpage

225

Lastpage

228

Abstract

Circuit techniques are described for multiple-antenna transceivers. A device desensitization technique aimed at simultaneously realizing the optimum noise and input match in LNA circuits is followed by a transformer-coupling technique in common-gate LNA circuits that reduces NF and power. Next, a Colpitts VCO improves start-up and maintains excellent phase-noise performance. Finally, a Cartesian combining method applied to MIMO transceivers is overviewed.

Keywords

CMOS analogue integrated circuits; MIMO systems; antenna radiation patterns; circuit noise; integrated circuit design; interference suppression; phase noise; radiofrequency amplifiers; random noise; transceivers; voltage-controlled oscillators; CMOS multiple-antenna transceivers; Cartesian combining method; Colpitts VCO; MIMO transceivers; NF reduction; circuit techniques; common-gate LNA circuits; design considerations; device desensitization technique; interference cancellation; low-noise amplifier; measured array pattern; noise factor; optimum input matching; optimum noise; phase-noise performance; power reduction; transformer-coupling technique; voltage-controlled oscillators; CMOS technology; Circuit noise; Coupling circuits; Impedance matching; Impedance measurement; Noise figure; Noise measurement; Noise reduction; Transceivers; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency integrated Circuits (RFIC) Symposium, 2005. Digest of Papers. 2005 IEEE

ISSN

1529-2517

Print_ISBN

0-7803-8983-2

Type

conf

DOI

10.1109/RFIC.2005.1489639

Filename

1489639