Title :
Some issues in gray code addressing
Author :
Mehta, Huzefa ; Owens, Robert Michael ; Irwin, Mary Jane
Author_Institution :
Dept. of Comput. & Sci. & Eng., University Park, PA, USA
Abstract :
Gray code addressing is one of the techniques previously proposed to reduce switching activity on high capacitance address bus lines. However in order to convert a system to gray address encoding there are several issues a designer needs to consider. This paper analyzes two issues which include gray code encodings for counter increments other than one and tradeoffs in power consumption incurred due to code conversions (binary to gray, gray to binary) when considering address increments and adders. Results are shown for different encodings and different configurations
Keywords :
CMOS digital integrated circuits; Gray codes; adders; capacitance; code convertors; adders; code conversions; counter increments; encoding; gray code addressing; high capacitance address bus lines; power consumption; Binary codes; Capacitance; Combinational circuits; Counting circuits; Delay; Encoding; Energy consumption; Portable computers; Reflective binary codes; Sequential circuits;
Conference_Titel :
VLSI, 1996. Proceedings., Sixth Great Lakes Symposium on
Conference_Location :
Ames, IA
Print_ISBN :
0-8186-7502-0
DOI :
10.1109/GLSV.1996.497616
