Title :
Test tradeoffs in ASIC design: tutorial
Author_Institution :
ECSE Dept., Rensselaer Polytech. Inst., Troy, NY, USA
Abstract :
In this tutorial test fundamentals are reviewed to introduce key concepts in design for test and built-in self-test. Design for test and built-in self-test are illustrated by their implementation in single-chip conversion of a PCB design and a floating point co-processor design, respectively. The savings in design effort when testability is part of the initial design is stressed
Keywords :
application specific integrated circuits; boundary scan testing; built-in self test; coprocessors; design for testability; integrated circuit design; integrated circuit testing; logic design; printed circuit design; printed circuit testing; ASIC design; PCB design; boundary scan; built-in self-test; design for test; digital circuits; floating point co-processor design; single-chip conversion; stuck at fault testing; test fundamentals; test tradeoffs; tutorial; Application specific integrated circuits; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Design automation; Design for testability; Digital circuits; Electronic equipment testing; Tutorial;
Conference_Titel :
ASIC Conference and Exhibit, 1993. Proceedings., Sixth Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-1375-5
DOI :
10.1109/ASIC.1993.410803
