DocumentCode :
1598697
Title :
On the low-power design of DCT and IDCT for low bit-rate video codecs
Author :
August, Nathaniel ; Sam ha, Dong
Author_Institution :
Intel Corp., Hillsboro, OR, USA
fYear :
2001
fDate :
6/23/1905 12:00:00 AM
Firstpage :
203
Lastpage :
207
Abstract :
Examines low power design techniques for discrete cosine transform (DCT) and inverse discrete cosine transform (IDCT) circuits applicable for low bit rate wireless video systems. The techniques include skipping low energy DCT input, skipping all-zero IDCT input, low precision constant multipliers, clock gating, and a low transition data path. The final DCT and IDCT blocks reduce average power dissipation by 95% over baseline reference blocks
Keywords :
discrete cosine transforms; integrated circuit design; low-power electronics; mobile communication; multiplying circuits; video codecs; all-zero IDCT input skipping; average power dissipation; baseline reference blocks; bit rate; clock gating; discrete cosine transform; inverse discrete cosine transform; low energy DCT input skipping; low power design techniques; low precision constant multipliers; transition data path; video codecs; wireless video systems; Bit rate; Computational complexity; Decoding; Discrete cosine transforms; Equations; Motion estimation; PSNR; Power dissipation; Video codecs; Video compression;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC/SOC Conference, 2001. Proceedings. 14th Annual IEEE International
Conference_Location :
Arlington, VA
Print_ISBN :
0-7803-6741-3
Type :
conf
DOI :
10.1109/ASIC.2001.954698
Filename :
954698
Link To Document :
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