• DocumentCode
    1606372
  • Title

    Opportunities and Challenges in Multi-Times-Programmable Floating-Gate Logic Non-Volatile Memories

  • Author

    Wang, Bin ; Ma, Yanjun

  • Author_Institution
    Impinj Inc., Seattle, WA
  • fYear
    2008
  • Firstpage
    22
  • Lastpage
    25
  • Abstract
    Low bit count floating gate (FG) logic NVM (LNVM) developed in baseline logic process is finding increasing use in system-on-chip (SOC) ICs due to its low cost and absence of extra process integration needs. This paper reviews the opportunities this technology brings to the eNVM fields and the technical challenges it faces. It also demonstrates that FG logic NVM is scalable to have 50A tunneling oxide to store the charge at 65 nm CMOS technology node and beyond.
  • Keywords
    logic design; system-on-chip; CMOS; floating gate logic nonvolatile memories; system-on-chip; CMOS logic circuits; CMOS process; CMOS technology; Costs; Logic programming; Nonvolatile memory; Process design; Read-write memory; System-on-a-chip; Tunneling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Non-Volatile Semiconductor Memory Workshop, 2008 and 2008 International Conference on Memory Technology and Design. NVSMW/ICMTD 2008. Joint
  • Conference_Location
    Opio
  • Print_ISBN
    978-1-4244-1546-5
  • Electronic_ISBN
    978-1-4244-1547-2
  • Type

    conf

  • DOI
    10.1109/NVSMW.2008.12
  • Filename
    4531812
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1606372