Title :
Evaluating VHDL-based ASIC synthesis tools
Author :
Hanna, W.A. ; Kaskowitz, R.A. ; Wallace, L.N.
Author_Institution :
McDonnel Douglas Electron. Syst. Co., St. Charles, MO, USA
Abstract :
An evaluation of VHSIC hardware description language (VHDL) based design tools using synthesis vs. schematic capture-macrocell approach to field programmable gate array (FPGA) design is described. The risk of committing to an ASIC technology for a project that may or may not go into production can be mitigated by using FPGAs. Designing with VHDL allows flexibility if the decision is made to migrate the design
Keywords :
application specific integrated circuits; circuit CAD; digital integrated circuits; integrated circuit technology; logic CAD; logic arrays; specification languages; ASIC synthesis tools; FPGA design; VHDL-based; VHSIC hardware description language; design tools; field programmable gate array; schematic capture-macrocell approach; Application specific integrated circuits; Design automation; Field programmable gate arrays; Foundries; Hardware; Integrated circuit technology; Libraries; Macrocell networks; Programmable logic arrays; Read only memory;
Conference_Titel :
ASIC Conference and Exhibit, 1992., Proceedings of Fifth Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-0768-2
DOI :
10.1109/ASIC.1992.270240
