Direct measurement of stress dependent inversion layer mobility using a novel test structure

Author

Okagaki, Takeshi ; Tanizawa, Motoaki ; Uchida, Tetsuya ; Kunikiyo, Tatsuga ; Sonoda, Ken´ichiro ; Igarashi, Motoshige ; Ishikawa, Kiyoshi ; Takeda, Toshifumi ; Lee, Peter ; Yokomizo, Goichi

Author_Institution

Renesas Technol. Corp., Hyogo, Japan

fYear

2004

Firstpage

120

Lastpage

121

Abstract

We propose a novel mobility measurement method which can be applied to industrial sized MOSFETs. The mobility variation caused by Shallow Trench Isolation (STI) stress is evaluated directly. Extracted piezoresistance coefficients in the inversion layer are close to their counterparts in bulk silicon. The stress effect model like that incorporated into BSIM4.3.0 is verified to adequately predict the behavior. Additionally, we have observed for the first time that the inversion layer mobility in <100> channel MOSFETs is less sensitive to the STI stress than that in <110> channel along MOSFETs. Therefore, CMOS devices with layouts the <100> direction is expected to have high performance with reduced source of design complication.

Keywords

CMOS integrated circuits; MOSFET; carrier mobility; integrated circuit design; integrated circuit modelling; integrated circuit testing; inversion layers; BSIM4.3.0; MOSFETs; Shallow Trench Isolation; piezoresistance coefficients; stress dependent inversion layer mobility; test structure; Capacitance measurement; Current measurement; Electrical resistance measurement; MOSFET circuits; Mechanical variables measurement; Piezoresistance; Silicon; Size measurement; Stress measurement; Testing;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, 2004. Digest of Technical Papers. 2004 Symposium on

Print_ISBN

0-7803-8289-7

Type

conf

DOI

10.1109/VLSIT.2004.1345428

Filename

1345428