DocumentCode
161122
Title
Excess noise of 850-nm silicon avalanche photodiodes fabricated using CMOS process
Author
Fang-Ping Chou ; Yu-Chen Hsieh ; Chih-Ai Huang ; Yue-Ming Hsin
Author_Institution
Dept. of Electr. Eng., Nat. Central Univ., Jhongli, Taiwan
fYear
2014
fDate
7-10 May 2014
Firstpage
1
Lastpage
3
Abstract
This study analyzes the effect of biases in the deep n-well on excess noise in 850-nm Si avalanche photodiodes (APDs). Si APDs were fabricated in standard 0.18-μm CMOS technology. The extra bias in the deep n-well can effectively eliminate the slow photo-generated carriers from the substrate and improve bandwidth and excess noise.
Keywords
CMOS integrated circuits; avalanche photodiodes; elemental semiconductors; optical fabrication; optical noise; silicon; APDs; CMOS process; Si; biases effect; deep n-well; excess noise; silicon avalanche photodiodes; size 0.18 mum; size 850 nm; slow photogenerated carriers; Avalanche photodiodes; CMOS integrated circuits; CMOS technology; Noise; Silicon; Standards; Substrates; CMOS process; Si avalanche photodiodes; excess noise;
fLanguage
English
Publisher
ieee
Conference_Titel
Next-Generation Electronics (ISNE), 2014 International Symposium on
Conference_Location
Kwei-Shan
Type
conf
DOI
10.1109/ISNE.2014.6839342
Filename
6839342
Link To Document