Title :
An implementation of a 2D FIR filter using the signed-digit number system
Author :
Seddiq, Yasser Mohammad ; Altwaijry, Hesham
Abstract :
An FIR filter is implemented in this work. Enhancing the arithmetic operations of the filter is considered. For the addition operation, the signed-digit number system is utilized. For the multiplication operation, Booth-3 algorithm is used to reduce the number of partial products. Then a 1D filter is used to construct a 2D filter that is deployed on real hardware in an image processing application.
Keywords :
FIR filters; digital arithmetic; field programmable gate arrays; image processing; 1D filter; 2D FIR filter; 2D filter; FPGA platform; arithmetic operations; computer arithmetic; image processing; signed-digit number system; Adders; Delay; Digital signal processing; Field programmable gate arrays; Filtering algorithms; Finite impulse response filter; Booth multiplier; Carry-save adder; Computer arithmetic; Digital signal processing; FIR filters; FPGA; Hardware implementation; Image processing; signed-digit number system;
Conference_Titel :
Electronics, Communications and Photonics Conference (SIECPC), 2011 Saudi International
Conference_Location :
Riyadh
Print_ISBN :
978-1-4577-0068-2
Electronic_ISBN :
978-1-4577-0067-5
DOI :
10.1109/SIECPC.2011.5876968
